Silicon Box
Evidence-led diligence on Silicon Box's advanced-packaging platform, scale-up economics, customer traction, competitive position, and financing risk.
A technically credible and capital-backed advanced-packaging scale-up whose production progress is offset by substantial financial, customer, and financing-term opacity.
覆盖范围与披露说明
Public evidence supports real production activity, financing, and institutional milestones, but private-company disclosure does not establish audited revenue, margins, cash runway, customer concentration, or current financing terms.
封面要素
公司概况
Silicon Box is a Singapore-founded semiconductor-packaging company focused on integrating chiplets into advanced packages using proprietary panel-level packaging. The evidence indicates a production operation, meaningful financing, and planned European expansion, while commercial scale and financial quality remain only partly observable because the company is private.
- 创始人
- Byung Joon (BJ) Han, Sehat Sutardja, Weili Dai
- 创立地点
- Singapore
- 总部
- Singapore
- 产品
- Chiplet design collaboration and advanced semiconductor packaging using proprietary SiPlet panel-level manufacturing and fine-pitch interconnects.
- 客户
- AI, high-performance computing, data-centre, automotive, mobile, IoT, robotics, and space applications.
- 商业模式
- Manufacturing and integration services for application-specific chiplet packages, with public pricing, contract terms, and customer-level revenue not disclosed.
- 阶段
- Private growth company
- 融资情况
- Public evidence describes a US$150M Series B2 equity round followed by S$100M debt financing with an additional US$75M upsizing option; full terms and drawn amounts are undisclosed.
执行摘要
主要优势
- Production evidence and reported shipment scale support a real operating platform.
- Founder and ecosystem credentials are credible for advanced semiconductor packaging.
- Equity and debt financing indicate institutional support for capacity expansion.
主要风险
- Audited revenue, margins, cash burn, runway, and customer concentration are undisclosed.
- Expansion is unusually capital intensive and adds construction, funding, and execution risk.
- The historical valuation mark is not supported by a current term sheet or verified earnings base.
未决问题
- Audited financial statements and a reconciled revenue, margin, cash, burn, and runway profile.
- Named customer production evidence, backlog, retention, concentration, and pilot-versus-volume mix.
- Current post-money valuation, cap table, liquidation preferences, debt covenants, and drawn proceeds.
目录
01Company Overview
1.1 Identity and operating model
Silicon Box was incorporated in Singapore in 2021 and is described across the retained sources as an advanced semiconductor packaging company rather than a chip designer or conventional wafer foundry. Its stated product and service model combines chiplet design collaboration with manufacturing using proprietary SiPlet panel-level packaging and sub-5-micron interconnects. The operating proposition is to assemble heterogeneous chiplets into packages for AI, high-performance computing, data-centre, automotive, mobile, IoT, robotics and space applications. The Singapore Tampines facility began mass production in late 2023, while a Novara facility is planned for Europe. The company’s positioning is therefore a specialized backend manufacturing and integration platform whose economics depend on yield, throughput, customer qualification and sustained capital access. Public material does not identify named production customers or disclose a complete commercial contract base, so the distinction between announced applications, early collaborations and recurring production revenue remains important.[CO001, CO002, CO003, CO004]
| Metric | Value or status | Date or period | Confidence | Gap |
|---|---|---|---|---|
| Founded | 2021 | 2021 | medium | Exact incorporation date is reported by a registry-style profile but not independently confirmed by a government filing in this pool. |
| Headquarters | Singapore; Tampines Industrial Avenue 3 | Current profile | medium | Registered address and operating headquarters are not separately reconciled. |
| Business model | Chiplet integration and panel-level semiconductor packaging | Current | medium | Pricing, contract structure and recurring revenue model are undisclosed. |
| Latest debt facility | S$100M (approximately US$77.65M), plus US$75M option | 2026-06-09 | medium | Drawn amount, covenants, maturity and option exercise are undisclosed. |
| Latest reported equity round | US$150M Series B2 | 2026-05/06 | medium | Round terms and primary-versus-secondary composition are undisclosed. |
| Private valuation | US$1.55B reported by a company-profile source | 2024-08-05 / later profile | low | No current term sheet or independent valuation confirmation. |
| Units shipped | 100 million | 2025-10-15 | medium | Company-issued milestone; customer mix and independent production records are unavailable. |
| Revenue | US$1.87M reported for 2024 by a profile source | 2024 | low | No audited statements or margin, burn and cash disclosures. |
| Employees | 238 reported by Tracxn | 2026-09-26 | low | Methodology and current headcount are not disclosed. |
Values combine company-issued releases, a regulatory decision and third-party profiles; private-company totals, estimates and nulls are not audited and should not be treated as interchangeable.
[CO001, CO002, CO009, CO010, CO011, CO012]Key founding, financing, production and public-support milestones evidenced in the assigned source pool.
Dates are retained as stated by the sources; no unreported interim dates or completion status is inferred.
Silicon Box founded [CO001, CO005]
SAFE financing recorded [CO009]
Tampines factory grand opening [CO003, CO013]
Mass production begins [CO003]
EU state-aid approval [CO013, CO014]
100M units shipped [CO003, CO004]
Series B2 and debt financing [CO009, CO010]
Debt facility announced [CO010]
Competitive packaging expansion reported [CO016]
1.2 Founders, leadership and governance
The retained evidence identifies Byung Joon (BJ) Han as co-founder and CEO, with Sehat Sutardja and Weili Dai as co-founders and board-level leaders. The founding group combines prior semiconductor packaging and semiconductor-system experience: the company-issued milestone release describes Han’s prior STATS ChipPAC leadership and the two other founders’ Marvell background, while an investor-authored account frames Sutardja’s 2015 chiplet presentation as part of the founding thesis. Tracxn’s current profile lists a five-member active board, including the founders and two independent members, but the profile also contains duplicate-name records and historical directors. This supports a governance structure broader than a three-person founding team, while leaving board committee responsibilities, control rights, succession planning and key-person mitigation unconfirmed. Han’s combined CEO, technical and industry role remains a material dependency for execution and credibility.[CO005, CO006, CO007, CO008]
| Person | Role | Background or coverage | Key-person dependency |
|---|---|---|---|
| Byung Joon (BJ) Han | Co-founder and CEO | Former STATS ChipPAC chairman, CEO and CTO according to the company-issued milestone release. | High: CEO, technical history and industry credibility are concentrated in one leader. |
| Sehat Sutardja | Co-founder and board chairman | Marvell co-founder; investor-authored material links him to the early chiplet thesis. | Medium: founder and board influence; operating remit is not disclosed. |
| Weili Dai | Co-founder and board director | Marvell co-founder and semiconductor entrepreneur. | Medium: founder and board influence; operating remit is not disclosed. |
| Matthew Charles Roberts | Independent board member | Listed by Tracxn as an active independent board member. | Unknown: committee responsibilities and relevant expertise are not disclosed. |
| JH Yee | Head of Operations | Company-issued 2025 release attributes panel-scale operations commentary to Yee. | Medium: operations continuity matters during high-volume scaling. |
| Mike Han | Head of Business | Company-issued 2025 release attributes business and customer-collaboration commentary to Mike Han. | Medium: commercial ownership and customer conversion metrics are not disclosed. |
This is a partial public leadership enumeration. Tracxn contains duplicate-name records and historical directors; roles and independence should be confirmed against the current corporate register.
[CO005, CO006, CO007, CO008]1.3 Funding, valuation and operating scale
Funding evidence is current but inconsistent in total-cash terminology. A June 2026 financing report describes S$100 million, approximately US$77.65 million, of debt financing with a further US$75 million upsizing option, following a US$150 million Series B2 equity round. Tracxn records US$658 million across seven rounds and a June 2026 conventional-debt round, while another company-profile source reports a different total and a US$1.55 billion private valuation. These figures should not be collapsed into one audited capitalization table: debt is not equity, a facility option is not cash drawn, and a private valuation is not liquid enterprise value. The company’s own October 2025 release reported 100 million units shipped and a planned full-capacity installation by 2028; later pool evidence reports higher 2026 shipment figures, but those later figures are not independently corroborated here. Revenue, margin, cash burn, cash on hand, runway, customer count and profitability remain open diligence items.[CO009, CO010, CO011, CO012]
| Stakeholder | Role | Control or economic importance | Diligence ask |
|---|---|---|---|
| Ares Management | Debt financing consortium | Lead or participating lender in the 2026 debt facility. | Obtain facility agreement, security package, covenants and drawn balance. |
| InnoVen Capital | Debt financing consortium | Participating lender in the 2026 debt facility. | Confirm lender terms and any conversion, warrant or collateral rights. |
| January Capital Growth Credit | Debt financing consortium | Participating lender in the 2026 debt facility. | Confirm facility allocation, maturity and remedies. |
| Abound Capital | Debt financing consortium | Participating lender in the 2026 debt facility. | Confirm commitment versus funded amount. |
| EDBI | Series B2 equity investor | Named participant in the 2026 equity financing in the retained profile. | Obtain round price, rights, liquidation preference and ownership percentage. |
| European Commission / Italy | State-aid and ecosystem sponsor | Approved approximately €1.3B aid for a €3.2B Novara project under EU State-aid rules. | Verify grant disbursement conditions, milestones, clawbacks and construction progress. |
| TDK Ventures | Investor and strategic ecosystem partner | Investor-authored source describes a thesis around chiplet packaging and production capability. | Separate marketing claims from verified commercial or technical deliverables. |
| Early customers and collaborators | Commercial demand and qualification counterparties | Company release says collaborations support early automotive, robotics, HPC and AI applications without naming customers. | Obtain named-customer references, production volumes, qualification status and concentration. |
Debt, equity, public support and customer relationships have different economic and control effects; the table intentionally does not convert them into a single ownership or cash figure.
[CO009, CO013, CO015, CO016]1.4 Milestones and unresolved diligence
The milestone record shows a progression from incorporation and founding, through facility opening and mass production, to public financing, regulatory support and reported shipment scale. The European Commission’s December 2024 decision is the strongest independent evidence for the planned Novara project: it approved an approximately €1.3 billion Italian state-aid measure for a €3.2 billion facility and described full-capacity operation as expected in 2033. This is evidence of policy approval and a funding structure, not proof that construction, qualification or commercial utilization will meet plan. Company-issued 2025 material is explicit that expansion plans, customer demand and European investment contain forward-looking risks, including construction delays, higher capital requirements, insufficient ecosystem support and adverse government action. TrendForce also reports that Intel is pursuing large advanced-packaging customers while expanding capacity, adding an external execution and competition risk. The principal overview conclusion is consequently conditional: the company has credible technical and institutional milestones, but investors still need audited financials, customer-level production evidence, the full debt and equity terms, board-control details and a current ownership register.[CO013, CO014, CO015, CO016]
1.5 Exhibits
02Market Analysis
2.1 Market boundary and substitution
The relevant market is outsourced advanced semiconductor packaging and chiplet-integration services that go beyond conventional wire-bond assembly and create higher-density, higher-performance package-level integration. It includes panel-level packaging, fan-out, 2.5D interposer, 3D stacking, hybrid bonding, and related design-to-test services when the advanced integration feature is part of the paid offering. It excludes front-end wafer fabrication, standalone chip design, ordinary assembly and test without advanced integration, and the full value of downstream chips or AI systems. The practical substitutes are monolithic dies, conventional wafer-level or substrate packages, incumbent 2.5D/3D platforms, and internal packaging programs. Chiplet architecture improves modularity and reuse, but buyers still compare complete delivered performance, yield, reliability, time-to-market, and qualified capacity rather than packaging geometry alone.[CM001, CM002, CM003]
| Segment/category | Included spend | Excluded spend | Buyer/payer | Relevance |
|---|---|---|---|---|
| Advanced packaging services | Package-level integration beyond wire bond: fan-out, 2.5D, 3D, hybrid bonding | Front-end wafer fabrication and ordinary assembly/test | Chip company or system OEM; product/manufacturing budget | Core service market |
| Panel-level packaging | Large-format panel processing and related integration/test revenue | Unrelated substrate or commodity packaging revenue | Chip designer, OEM, or outsourced packaging buyer | Silicon Box's differentiated format |
| Chiplet integration | Design collaboration, interconnect, assembly, qualification, and manufacturing tied to chiplet products | Standalone IP or chip design without packaging delivery | Architecture and engineering owner; program budget | Adoption and attach opportunity |
| Status-quo substitutes | Monolithic die, conventional wafer-level/substrate package, incumbent 2.5D/3D service | End-market system revenue | Same product owner; engineering and sourcing budget | Competitive ceiling on pricing and adoption |
Boundary follows McKinsey's description of advanced packaging as higher-value back-end integration beyond traditional wire-bond methods; categories are analytical separations, not separately reported company revenue.
[CM001, CM002, CM003]2.2 Sizing lenses and market momentum
No single published number should be treated as Silicon Box's directly addressable market. Mordor's advanced-packaging definition estimates USD 51.62 billion in 2025, USD 57.46 billion in 2026, and USD 90.11 billion in 2031, while explicitly using a proprietary estimation framework. McKinsey instead frames the broader semiconductor market as potentially exceeding USD 1 trillion by 2030, not as packaging revenue. Deloitte's separate lens estimates the AI-chip market at about USD 500 billion in 2026, which is an upstream device market and therefore an opportunity driver rather than a packaging TAM. The market case is strongest where these lenses intersect: AI and HPC raise package performance and capacity requirements, automotive and other embedded systems add diversified demand, and public subsidies encourage regional back-end investment. These figures are directional lenses with different denominators, not additive layers.[CM004, CM005, CM006, CM007]
| Publisher | Year | Geography | Value | CAGR | Methodology | Confidence | Limitation |
|---|---|---|---|---|---|---|---|
| Mordor Intelligence | 2026 | Global | USD 57.46B advanced packaging market | 9.42% 2026-2031 | Proprietary estimation framework; top-down and bottom-up checks described in source | medium | Scope and forecast are publisher-defined; not Silicon Box SAM |
| Mordor Intelligence | 2026 | Global | USD 90.11B by 2031 | 9.42% 2026-2031 | Advanced packaging revenue forecast | medium | Panel-level packaging is a sub-platform; value is not additive to other lenses |
| Deloitte | 2026 | Global | About USD 500B AI-chip market | Not stated in fetched excerpt | Earnings calls, company presentations, WSTS and IDC cross-validation | high | Upstream AI-chip market, not packaging revenue |
| McKinsey | 2024 | Global | More than USD 1T semiconductor market by 2030 | Not stated in fetched excerpt | Industry outlook and scenario framing | high | Broad semiconductor market; packaging share is not isolated |
Values use each publisher's stated unit, year, geography, and denominator. They are alternative sizing lenses and must not be summed into a TAM/SAM/SOM funnel.
[CM004, CM005, CM006, CM007]Alternative market lenses narrow from the broad semiconductor and AI-chip opportunity to the advanced-packaging revenue pool without implying additive conversion.
各层宽度仅表示层级,不代表数值比例。
The layers reproduce separate publisher values with different denominators and time bases; they are not additive or a mathematically comparable TAM/SAM/SOM conversion. The panel-level item is a growth rate, not market value, and the greater-than USD 1 trillion forecast is plotted at its stated lower bound.
[CM004, CM005, CM006, CM007]2.3 Buyer segments and adoption path
The economic buyer is typically a semiconductor company, hyperscaler, systems company, or device OEM that owns product cost, performance, reliability, and launch timing; the user is the chip, package, or system engineering team; and the payer is the product or manufacturing budget owner, sometimes supported by strategic or public capital. Adoption begins with architecture and design collaboration, proceeds through qualification and reliability testing, and reaches recurring production only after yield, thermal, electrical, and delivery commitments are demonstrated. AI training and inference products are the most urgent trigger because dense memory and die-to-die connections constrain system performance. Automotive, mobile, robotics, and other high-volume applications can broaden the base, but have longer qualification cycles and different reliability or cost thresholds.[CM008, CM009, CM010]
| Segment | Buyer | User | Payer | Workflow | Budget owner | Adoption trigger |
|---|---|---|---|---|---|---|
| AI/HPC accelerators | Fabless chip company or hyperscaler | Architecture and package engineering | Product and infrastructure budget | Co-design to qualification to volume production | Product/operations | HBM and die-to-die bandwidth or capacity constraint |
| Automotive and EV | Tier-1, OEM, or automotive semiconductor supplier | Reliability and power-electronics engineering | Program and quality budget | Long qualification and production ramp | Program procurement | Thermal cycling, efficiency, and long-life reliability |
| Mobile and consumer | SoC vendor or device OEM | Package, RF, and product engineering | Product cost and launch budget | Design-in to high-volume manufacturing | Product sourcing | Thinness, power, yield, and cost |
| Robotics and industrial | Robotics OEM or system integrator | Compute and controls engineering | Product and capital-equipment budget | Pilot, field validation, then repeat production | Program owner | Edge compute performance and supply assurance |
Buyer roles and workflows are an evidence-constrained operating map synthesized from the cited application and qualification descriptions; contract values, price points, and customer names are not disclosed in the assigned sources.
[CM008, CM009, CM010, CM013]2.4 Constraints, timing, and diligence gaps
Demand is not equivalent to near-term serviceable revenue. SemiAnalysis describes CoWoS and HBM as bottlenecks for leading-edge AI accelerators, but alternative packaging technologies and capacity additions can redirect spending. Mordor's estimate also says capital intensity above USD 500 million per panel-level line and rapid depreciation can compress margins and make financing difficult without customer prepayments. Silicon Box reports shipment and expansion milestones, yet the assigned evidence does not disclose customer names, production-versus-pilot mix, contracted capacity, package pricing, or conversion from shipments to recurring revenue. The investable sizing question therefore remains constrained: validate the buyer pipeline, qualification status, unit economics, capacity reservations, and the share of the published market that can actually be served by Silicon Box's process and geography.[CM011, CM012, CM013, CM014, CM015, CM016]
2.5 Exhibits
03Competitors
3.1 Competitive landscape and profiles
The competitive set is broader than venture-backed chiplet specialists. Silicon Box describes a panel-level production model for chiplet packages, while established outsourced semiconductor assembly and test providers compete with wafer-scale, 2.5D, 3D, system-in-package, and test offerings. Tracxn lists Amkor, RRP Electronics, HANA Micron, UTAC, Unisem, and KYEC Group among the active alternatives, but its rankings are a screening signal rather than a capability benchmark. The relevant buyer choice is therefore between Silicon Box's specialized panel-scale route, incumbent OSAT capacity, foundry-owned packaging such as TSMC CoWoS, Intel's EMIB/Foveros ecosystem, and internal or outsourced design-plus-packaging programs. Public evidence does not establish a complete list of qualified suppliers or the exact customer overlap.[CP001, CP002, CP003, CP004]
| Competitor or alternative | Category | Scale or funding signal | Target segment | Differentiation or scope | Limitation or diligence gap |
|---|---|---|---|---|---|
| Silicon Box | Direct specialist | $658M total funding reported by Tracxn; 238 employees as of Sep 26 | AI, HPC, automotive, robotics, mobile, IoT | Proprietary SiPlet panel-level packaging; sub-5-micron interconnect density reported by Tracxn | Customer names, realized pricing, and independent yield benchmarks are not disclosed |
| Amkor | Incumbent OSAT | $1.322B Q1 2025 sales; $400M CHIPS Act award reported | Computing, networking, PC, consumer, automotive, industrial | Global footprint; 2.5D AI-GPU engagements and advanced SIP | Panel-level adoption timing and customer-specific qualification evidence are incomplete |
| ASE | Incumbent OSAT | NT$148,153M Q1 2025 sales; US$4.62B equivalent reported | Broad electronics and advanced packaging customers | World's largest OSAT in the assigned market report; leading-edge packaging | Pilot-line adoption and customer qualification timing remained dependent on customers |
| TSMC | Foundry-integrated incumbent | CoWoS advanced-packaging revenue reported at roughly 8% of 2024 revenue | AI accelerators and high-bandwidth-memory systems | CoWoS-L integrates RDL and partial silicon interposer | Capacity is concentrated and additional sites face construction and land timing |
| Intel | Foundry and packaging incumbent | Public scale signal; no comparable package revenue in assigned evidence | US-based advanced packaging and integrated systems | EMIB and FOEB cited as alternative technologies | Comparable Silicon Box pricing, yield, and customer overlap are unknown |
| RRP Electronics | Adjacent OSAT | $56.4M funding reported by Tracxn | Semiconductor assembly, testing, and packaging services | Assembly/testing alternative in Tracxn's competitor set | No assigned evidence on panel-level capability or customer qualification |
| HANA Micron | Adjacent OSAT | Public company; funding not reported in Tracxn extract | Semiconductor back-end process solutions | Established back-end process alternative | No assigned evidence on chiplet panel-scale capability or pricing |
| Internal build | Substitute | No public scale or funding signal | Large semiconductor companies with sufficient capital and engineering | Maximum process control and integration with proprietary designs | High capex, long qualification cycle, and execution burden are not quantified |
Sources combine Tracxn screening data, incumbent financial/operating disclosures summarized by Mark LaPedus, and company-issued Silicon Box releases; scale measures are not directly comparable and unknown cells are evidence gaps.
[CP001, CP002, CP003, CP004, CP007, CP008]3.2 Capability, distribution, and switching trade-offs
Silicon Box's strongest stated differentiator is the combination of panel-scale manufacturing, high interconnection density, and commercial yield. Its 2025 release reported 100 million units shipped and said the Singapore site was the largest facility of its kind by production capacity; a 2026 company release reported 500 million units and a planned tenfold capacity ramp. Those are company-issued operating claims, not independent benchmark results. Incumbent alternatives bring a different advantage: Amkor reported multiple AI-GPU engagements using 2.5D technology, while ASE reported leading-edge advanced packaging at 10% of ATM revenue in Q1 2025. Qualification, reliability data, package design rules, substrate and test access, and customer engineering history create switching costs. A buyer can multi-home across suppliers, but a production transfer still requires qualification and compatible upstream and downstream flows. Public pricing is unavailable for all compared providers, so the matrix records unknown rather than inferring a discount from claimed cost advantages.[CP005, CP006, CP007, CP008, CP009]
| Buying criterion | Silicon Box | Amkor | ASE | TSMC or Intel | Evidence implication |
|---|---|---|---|---|---|
| Panel-level mass production | Company claims exclusive panel-level production and high yield | Unknown in assigned evidence | Pilot line and customer qualification discussed | TSMC CoWoS and Intel EMIB/FOEB are alternative architectures | Silicon Box has a differentiated stated process, but cross-vendor yield is not independently comparable |
| Chiplet interconnect density | Sub-5-micron density reported by Tracxn | 2.5D AI-GPU engagements reported | Advanced packaging capability reported | CoWoS-L uses RDL and partial silicon interposer; Intel alternatives cited | Architecture fit depends on package design and qualification, not a single universal score |
| High-volume execution | 100M units in 2025 and 500M units in 2026 claimed by company releases | AI-GPU and consumer SIP programs reported | Advanced-platform test utilization reported full | TSMC and Intel have large incumbent ecosystems | Volume signals exist, but product mix, yield denominator, and customer acceptance differ |
| Reliability and quality posture | ISO 9001, ISO 14001, and ISO 45001 certifications reported | Long-standing partnerships cited by management | Customer qualification timing remains explicit | Incumbent qualification history is not quantified in assigned sources | Certification is not equivalent to package-level field reliability |
| Distribution and ecosystem | Best-in-class partners and early customers claimed; names not disclosed | Diversified global footprint and long-standing partnerships | Broad OSAT customer base implied by scale | Foundry and integrated ecosystem access | Silicon Box may face channel and qualification asymmetry |
| Cost and pricing | Low-cost and affordable alternatives claimed | No public list price in assigned evidence | No public list price in assigned evidence | No public comparable price in assigned evidence | Realized price, cost per package, and discount structure require diligence |
Cells distinguish company claims from third-party reports; 'Unknown' means the assigned pool did not support a comparable observation, not that the capability is absent.
[CP005, CP006, CP007, CP008, CP009, CP010, CP011]| Provider or route | Price or contract model | Included capability or package model | Discount or unknown | Buyer implication |
|---|---|---|---|---|
| Silicon Box | Not publicly disclosed | Panel-level chiplet integration and end-to-end services claimed | Realized price and contract terms unknown | Request customer-level quotations and cost-per-package bridge |
| Amkor | Not publicly disclosed in assigned evidence | OSAT assembly/test, 2.5D AI-GPU and advanced SIP programs | Discounts and qualification fees unknown | Benchmark against global footprint and existing customer programs |
| ASE | Not publicly disclosed in assigned evidence | ATM services and leading-edge advanced packaging | Discounts, capacity reservation, and pilot economics unknown | Assess qualification queue and economic viability of new capacity |
| TSMC CoWoS | Not publicly disclosed in assigned evidence | CoWoS-L advanced packaging with HBM-oriented integration | Allocation and customer-specific terms unknown | Capacity access may matter more than nominal price |
| Intel EMIB or FOEB | Not publicly disclosed in assigned evidence | Alternative advanced-packaging technologies | Commercial terms and ecosystem constraints unknown | Evaluate integrated foundry and US-location trade-offs |
| Internal build | Capital project; amount and payback unknown | Maximum control over design, process, and scheduling | Utilization and ramp risk unknown | Use only where scale and strategic control justify capex |
No assigned source publishes comparable list or realized pricing; all commercial fields marked unknown are explicit diligence gaps rather than estimates.
[CP009, CP012, CP013]An evidence-backed ordinal map places Silicon Box high on panel-level specialization but below incumbent scale, while incumbent routes trade specialization for distribution and capacity.
| 条目 | X (2–4) | Y (1–4) | 说明 |
|---|---|---|---|
| 1. Silicon Box | 4 | 2 | Ordinal placement based on company claims, Tracxn screening, and assigned incumbent evidence |
| 2. Amkor | 2 | 4 | Global OSAT and reported AI-GPU engagements |
| 3. ASE | 2 | 4 | Large OSAT with reported advanced-packaging revenue |
| 4. TSMC CoWoS | 3 | 4 | Foundry-integrated advanced packaging and capacity expansion |
| 5. Intel EMIB/FOEB | 3 | 3 | Alternative technologies cited by independent reporting |
| 6. Internal build | 4 | 1 | Maximum control but no public scale evidence |
Coordinates are ordinal, not measured market shares, pricing scores, or performance benchmarks; assigned sources support relative positioning only.
[CP005, CP007, CP010, CP011, CP012]3.3 Moat durability and displacement risk
The moat is plausible but not yet durable on public evidence. TDK Ventures attributes Silicon Box's appeal to chiplet interconnect innovation, large-format high-yield production, team expertise, and ecosystem backing, but that is investor commentary from a partner rather than an independent benchmark. Meanwhile, independent reporting describes persistent 2.5D/3D packaging bottlenecks, spillover demand benefiting SPIL and Amkor, and Intel gaining traction from EMIB and FOEB. TSMC's CoWoS-L is reported to offer high performance, yield, and cost efficiency while TSMC expands its footprint. This creates both demand tailwind and displacement risk: constrained capacity may help an independent provider win qualification, while foundry and incumbent investment can compress its differentiation. The critical diligence question is whether Silicon Box's yield, reliability, cost per package, and customer retention remain superior after competing capacity arrives; the assigned evidence does not disclose those customer-level comparisons.[CP010, CP011, CP012, CP013]
3.4 Exhibits
04Financials
4.1 Revenue model and commercial traction
Silicon Box appears to monetize end-to-end chiplet integration and advanced panel-level packaging rather than a software subscription or standardized commodity component. Its public materials describe design consultation, packaging and manufacturing, with customer collaboration around application-specific solutions. The October 2025 company release reported 100 million units shipped from the Tampines facility, but it did not disclose ASP, contract terms, customer names, revenue by application, or the split between qualification, R&D and production. A third-party profile reports US$1.87 million of 2024 factory-year revenue from pre-qualified customers and R&D; because that profile is not an audited filing, it is a directional datapoint rather than a verified revenue base. The commercial question is thus not whether the factory can ship, but whether unit volume converts into durable, profitable customer programs.[CI001, CI003, CI004]
| Stream | Mechanism | Unit | Current public value/status | Quality | Diligence ask |
|---|---|---|---|---|---|
| Chiplet design consultation | Application-specific co-design before packaging | Program / engagement | Mentioned as end-to-end capability; price undisclosed | Company-described | Obtain signed SOWs, fees and conversion to production |
| Panel-level packaging and integration | Manufacture chiplet packages at panel scale | Unit / good unit | 100M units shipped by 2025-10-15; ASP undisclosed | Company-claimed volume | Tie units to invoices, ASP, yield and customer |
| Testing and future European services | Planned native test and full value-chain capability | Facility / program | Italy production targeted for 2028 | Planned | Verify customer commitments, capex and grant milestones |
| 2024 production revenue | Revenue from pre-qualified customers and R&D | USD | US$1.87M reported by a third-party profile | Third-party reported | Confirm audited revenue recognition and customer mix |
Public sources mix company shipment claims, planned capacity and a third-party revenue datapoint; units shipped are not revenue or ARR.
[CI001, CI003, CI004]4.2 Pricing, cost structure and unit economics
No public source in the assigned evidence set provides a list price, realized price, gross margin, customer acquisition cost, payback period, utilization, or contribution margin. Silicon Box positions panel-level packaging as a lower-cost alternative to wafer-level and traditional packaging, while its own release also emphasizes high performance and high yield; those are company claims about the value proposition, not evidence of realized margin. The operating model is likely exposed to cleanroom, materials, test, utilities, labor, yield and depreciation costs, but the evidence does not quantify any of those items. Accordingly, a financial model should keep ASP, yield-adjusted cost per good unit, utilization and customer-specific engineering charges as explicit unknowns instead of inferring them from shipment counts. A buyer diligence package should reconcile contracted pricing to invoices and map each production program from qualification through volume ramp.[CI005, CI006, CI007, CI008]
| Metric | Value | Confidence | Why it matters | Diligence ask |
|---|---|---|---|---|
| List price / realized ASP | Low | Determines revenue per good unit and mix sensitivity | Provide contracts, price lists and invoice bridge | |
| Gross margin | Low | Tests whether scale creates economic leverage | Provide audited gross-margin bridge by program | |
| Yield | 99.7% historical wafer-scale benchmark | Medium | Yield affects good-unit cost and customer economics | Provide current panel-scale yield by product and period |
| Utilization | Low | Fixed-cost absorption depends on loaded capacity | Provide monthly capacity and utilization report | |
| CAC / payback | Low | Shows commercial efficiency for design wins | Provide sales expense, cycle length and cohort conversion | |
| Cash burn / runway | Low | Determines financing dependency | Provide 36-month cash-flow forecast and bank statements |
Null means not disclosed in the assigned public evidence, not zero. The yield figure is a company-reported historical benchmark and is not a margin proxy.
[CI005, CI006, CI007, CI008, CI013]4.3 Capital adequacy and financing dependency
Silicon Box has financed a manufacturing build-out with a mixture of equity and debt, but disclosed proceeds are not the same as cash available for operations. The company announced SGD100 million of debt financing in June 2026, including an option to upsize by an additional US$75 million, and said proceeds would be used for capacity expansion. The same release said this debt followed a US$150 million Series B2 equity round. A law-firm deal description separately describes US$100 million, US$150 million and S$100 million transactions, corroborating the existence of a substantial financing stack but not providing covenants, interest rates, maturity, collateral, cash balance or remaining proceeds. Expansion plans add further funding exposure: external coverage describes the Italian project as a €3.2 billion facility with a planned 2028 start, while trade coverage separately reports €1.3 billion in Italian government funding without public drawdown conditions. Without cash, burn, capex phasing, grants, customer prepayments and debt schedules, runway and next-round trigger remain unquantified.[CI002, CI009, CI010, CI011, CI012]
| Item | Amount / timing | Status | Financial implication | Diligence ask |
|---|---|---|---|---|
| June 2026 debt facility | SGD100M plus option for additional US$75M | Announced | Adds non-dilutive capital but creates debt service obligations | Review term sheet, maturity, covenants and security |
| Series B2 equity | US$150M | Announced by company | Increases capital base without debt service | Confirm closing, use of proceeds and cap table |
| Italy Novara facility | €3.2B; production targeted 2028 | Planned | Large future capex and execution exposure | Reconcile sources, grants, equity, debt and construction commitments |
| Italian government funding | €1.3B described by project coverage | Government support reported | May reduce net project funding need subject to conditions | Obtain award agreement and drawdown conditions |
| Singapore capacity installation | Full installation expected by 2028 | Company plan | Requires staged capex and working capital | Provide capex phasing, equipment orders and utilization ramp |
Financing raised, government support and planned investment are different quantities; this table does not treat any disclosed amount as cash on hand.
[CI002, CI009, CI010, CI011, CI012, CI014]4.4 Underwriting verdict and diligence blockers
The evidence supports a technically credible, capital-backed manufacturing scale-up, not a fully underwritten financial profile. The strongest positive indicators are high-volume shipment claims, a reported 99.7% historical wafer-scale yield benchmark, a debt facility with named institutional lenders, and an identified European expansion program. The strongest negative indicator is disclosure opacity: the sources do not establish recurring revenue, gross profit, free cash flow, cash on hand, monthly burn, customer concentration, realized pricing or debt service capacity. The 2025 company release itself lists demand changes, construction delays, increased capital requirements, government support changes and insufficient ecosystem support among risks that could make actual results differ from plans. For investment underwriting, the decision should remain conditional on audited financial statements, customer-level bookings and backlog, capacity utilization, yield by product, capex commitments, grant conditions and a reconciled financing waterfall.[CI013, CI014, CI015, CI016]
Public evidence supports a production-to-revenue-to-capital model, but the revenue and cash-conversion stages remain incompletely disclosed.
| 节点 / 连接 | 节点 / 起点 | 终点 | 说明 |
|---|---|---|---|
| 节点 1 | Design consultation / co-design [design] | Program Pricing and conversion not disclosed | |
| 节点 2 | Customer qualification [qualification] | Pre-qualified customers reported Customer names and program count not disclosed | |
| 节点 3 | Panel-level production [production] | 100M units by 2025-10-15 Company-claimed shipment volume | |
| 节点 4 | Recognized revenue [revenue] | US$1.87M in 2024 reported Third-party profile; not audited here | |
| 节点 5 | Gross profit [gross-profit] | Unavailable Margin and cost per good unit undisclosed | |
| 节点 6 | Capacity reinvestment [reinvestment] | Debt and expansion financing Cash balance and runway undisclosed | |
| 连接 1 | Design consultation / co-design [design] | Customer qualification [qualification] | |
| 连接 2 | Customer qualification [qualification] | Panel-level production [production] | |
| 连接 3 | Panel-level production [production] | Recognized revenue [revenue] | |
| 连接 4 | Recognized revenue [revenue] | Gross profit [gross-profit] | |
| 连接 5 | Gross profit [gross-profit] | Capacity reinvestment [reinvestment] |
4.5 Exhibits
05Product & Technology
5.1 Product and customer workflow
Silicon Box sells semiconductor integration and packaging rather than a software product. The workflow begins with a customer's chiplet or die design and requires package architecture, interconnection, assembly, testing, and delivery of finished devices. Tracxn describes the company as providing "end-to-end semiconductor integration services, from chiplet design consultation through final manufacturing," while the company describes its technology as addressing performance, scalability, and cost constraints in wafer-level and traditional packaging. The practical customer value proposition is to fit square chips on square panels, increase usable manufacturing area, and provide a route to chiplet-based systems for AI, HPC, automotive, robotics, mobile, and IoT applications. Business Times reports that the company's panels have more than six times the productive area of standard 300 mm wafers, but this is an external description rather than a disclosed product specification. The public record does not identify customer names, package-level benchmark results, or realized cost savings, so those benefits should be treated as claims requiring customer and engineering diligence.[CE001, CE002, CE003, CE004]
| Module or asset | Buyer/user | Status or maturity | Differentiation | Diligence gap |
|---|---|---|---|---|
| Chiplet design consultation | Fabless semiconductor and system designers | Offered as part of end-to-end integration | Links package architecture to customer die requirements | Public materials do not specify design tools, interfaces, or delivered design artifacts |
| Panel-level package integration | Chiplet and device customers | Commercial production reported at Tampines | Square-panel format and high-density interconnect are claimed differentiators | Obtain process design kit, package limits, and independently measured electrical/thermal results |
| Manufacturing and assembly line | Semiconductor customers | Mass production since late 2023 | Large-format panel manufacturing rather than only circular wafers | Verify equipment availability, cycle time, scrap rate, and capacity utilization |
| Testing and final manufacturing | Automotive, AI, HPC, mobile, and robotics customers | Singapore test scope public only at a high level; native test planned for Novara | Intended to provide a more complete value chain | Confirm test coverage, qualification flow, and customer acceptance data |
| Quality and environmental controls | Customers and regulated automotive users | ISO 9001, ISO 14001, and ISO 45001 reported; automotive conformance letter reported | Formalized quality, environmental, and occupational-safety systems | Review certificates, scope, expiry, audit findings, and IATF certification status |
Company and third-party descriptions mix current Singapore capabilities with planned Novara capabilities; status is therefore deliberately separated from roadmap claims.
[CE001, CE005, CE009, CE011, CE014]| User job | Current workflow | Silicon Box solution | Measurable benefit | Limitation |
|---|---|---|---|---|
| Integrate multiple dies into one system | Package separate chiplets using conventional wafer-oriented flows | Panel-level chiplet integration | Claimed improvements in performance, scalability, and cost | No independent package benchmark or realized savings disclosed |
| Increase package manufacturing area | Place square dies on circular wafers | Place square dies on square panels | Business Times reports more than six times the productive area of a standard 300 mm wafer | Source does not disclose the comparable process boundary or yield basis |
| Ramp high-volume devices | Qualify a package and then scale production | Tampines line with reported 100 million and 500 million unit milestones | Demonstrated shipment scale as reported by the company | Product mix, unit definition, and customer acceptance are not public |
| Support automotive compute | Develop package for vehicle and ADAS requirements | Automotive chiplet co-development and imec consortium participation reported | Potential standards and qualification collaboration | Full automotive certification and production deployments remain unverified |
| Adopt open chiplet ecosystem interfaces | Integrate components across an evolving standards landscape | Participate in a market where UCIe provides an open chiplet standard | Interoperability is a stated ecosystem objective | UCIe membership or compliance does not prove a Silicon Box product is interoperable |
Benefits are separated from limitations because most performance and cost outcomes are company- or partner-reported rather than independently benchmarked.
[CE002, CE003, CE004, CE010, CE012]5.2 Architecture, manufacturing maturity, and roadmap
The disclosed operating architecture is a panel-level packaging line with chiplet interconnection, manufacturing execution, quality controls, and testing. The Singapore Tampines facility began mass production in late 2023 and Silicon Box reported shipping 100 million units in October 2025 and 500 million units in August 2026. These milestones indicate commercial production maturity at the facility level, although the company-issued figures do not disclose the number of distinct products, die types, test coverage, defect definitions, or customer acceptance criteria. The company says the Singapore site is undergoing a US$300 million expansion, aims to increase production capacity by a factor of ten within 2026, and expects full capacity installation by 2028. A second Novara facility is planned for 2028 with native test capability. Those expansion and roadmap dates are forward-looking company statements; construction completion, qualification timing, and actual customer allocation remain open questions.[CE005, CE006, CE007, CE008]
| Layer or process | Role | Dependency | Risk |
|---|---|---|---|
| Chiplet design and package architecture | Translate customer die requirements into an integrated package | Customer die designs and package/interface specifications | Integration errors or unclear interface ownership can delay qualification |
| High-density interconnection | Connect chiplets within the package | Fine-pitch process capability and compatible die/interface designs | Claimed sub-5-micron density lacks an independent test report in the assigned sources |
| Panel-level assembly | Build packages on large square panels | Specialized equipment, materials, process recipes, and supply continuity | Ramp, defect, and warpage performance at panel scale are not publicly quantified |
| Test and qualification | Validate finished devices and support customer release | Test infrastructure plus customer and automotive qualification requirements | Singapore and planned European test scope may not be equivalent |
| Quality, environment, and safety management | Control manufacturing and operational risks | ISO systems and customer-specific quality audits | Certificates do not disclose current audit findings or product-level reliability results |
| European expansion | Add a Novara design-to-test manufacturing footprint | Construction, financing, permits, grants, suppliers, and hiring | 2028 production is forward-looking and exposed to execution and capital risk |
This architecture is an evidence-bounded operating model assembled from disclosed company, partner, industry, and technical sources; it is not a verified process flow diagram.
[CE005, CE006, CE007, CE009, CE011, CE013]The public evidence supports a layered packaging workflow from chiplet design through panel manufacturing, testing, and qualification, with European expansion as a planned layer.
- Customer inputs
- Customer chiplet or die designs and package/interface requirements start the integration workflow.
- 模块
- Chiplet or die designs
- Package and interface requirements
- Integration architecture
- Package architecture and dense interconnection combine multiple dies into one package.
- 模块
- Chiplet architecture
- High-density interconnection
- Panel manufacturing
- Square-panel assembly is the central manufacturing differentiator.
- 模块
- Square-panel assembly
- Tampines high-volume line
- Validation and quality
- Testing, qualification, and management-system controls support customer release.
- 模块
- Testing and qualification
- ISO and automotive quality controls
- Customer applications
- Public materials identify AI, HPC, automotive, mobile, IoT, and robotics use cases.
- 模块
- AI and HPC packages
- Automotive and robotics packages
- European expansion
- Novara is a planned 2028 facility with native test capability.
- 模块
- Novara facility
- Native European test capability
5.3 Differentiation, trust, and technical risk
Silicon Box's claimed differentiation combines panel-scale manufacturing, high-density chiplet interconnection, and a founding team with prior packaging experience. TDK Ventures characterizes the approach as using panel packaging and short chiplet-to-chiplet interconnects, while Tracxn reports a claimed sub-5-micron interconnect density. These sources establish the nature of the proposed architecture, not an independently reproducible benchmark. The strongest observable control evidence is certification: the Tampines operation is reported to have achieved ISO 9001:2015 in 2024, ISO 14001:2015 and ISO 45001:2018 in 2025, and an AutomotiveWorld report says the company received an IATF 16949 Letter of Conformance ahead of full automotive certification. UCIe's public consortium material confirms that open chiplet interoperability is an active ecosystem requirement, but it does not establish Silicon Box compliance. Key risks are therefore qualification and interoperability, yield measurement at panel scale, dependence on specialized equipment and suppliers, and execution of a capital-intensive second fab. No public security, privacy, product-recall, outage, or incident disclosure was found in the assigned evidence; that absence is not evidence that no incidents exist.[CE009, CE010, CE011, CE012, CE013, CE014, CE015]
5.4 Exhibits
06Customers
6.1 Customer segments and buying motion
Silicon Box positions its offering as end-to-end chiplet design consultation, packaging, manufacturing, and testing rather than as a standardized component sold through a self-serve channel. Public materials point to automotive, AI, HPC, mobile, IoT, robotics, and space applications, with the automotive program providing the clearest current vertical signal. The buyer is likely an engineering and procurement organization that must qualify a packaging process, not an individual software user; however, the sources do not disclose named accounts, contract sizes, qualification stages, or whether volume is customer production, internal qualification, or R&D. The 2026 automotive announcement says the company is co-developing packages with customers for next-generation ADAS, while its factory announcement describes collaboration with early customers, so customer involvement is evidenced but customer identity and commercial terms remain opaque.[CU001, CU002, CU003, CU004]
| Segment | Buyer/user/payer | Use case | Public scale signal | Strategic value | Gap |
|---|---|---|---|---|---|
| Automotive | Automotive OEMs, Tier 1s, and semiconductor partners | Chiplet packages for ADAS and software-defined vehicles | Co-development disclosed; no account count | Standards-led qualification can create durable programs | Named accounts, SOP dates, and paid production status unavailable |
| AI and HPC | Chip designers, system companies, and compute manufacturers | High-density chiplet packaging for compute systems | Factories and unit milestones disclosed | Large demand opportunity and high technical value | No customer names, backlog, or revenue mix |
| Mobile, IoT, robotics, and space | Device and system manufacturers | Application-specific heterogeneous integration | Listed as target sectors | Broadens end-market optionality | No deployment or utilization evidence |
| Foundry/design-service workflow | Chip designers and foundry ecosystem partners | Design consultation through packaging, manufacturing, and test | End-to-end model described | May reduce customer integration burden | Pricing, cycle time, and conversion funnel undisclosed |
Segments are reconstructed from company and partner descriptions; public materials do not provide customer counts, revenue bands, or production-versus-pilot denominators.
[CU001, CU002, CU003, CU004]6.2 Adoption trajectory and named-customer proof
Production milestones are the strongest observable adoption proxy. Silicon Box reported 100 million units shipped in October 2025 and more than 250 million by Q1 2026, while a June 2026 financing release described capacity expansion to meet demand. These are company-issued operating figures and do not identify customers, units per account, revenue contribution, or repeat orders. Imec participation adds ecosystem validation and an automotive qualification path, including an IATF 16949 letter of conformance and stated co-development, but it is not proof of a named production customer. The customer diligence conclusion is therefore “scaled process with customer collaboration disclosed, account-level adoption unverified.”[CU005, CU006, CU007, CU008, CU009]
| Metric | Value | Date/period | Source posture | Confidence | Implication | Missing denominator |
|---|---|---|---|---|---|---|
| Units shipped | 100 million | October 15, 2025 | Company-issued release syndicated by Newswire | Medium | Demonstrates volume production | Customers, units per account, paid mix |
| Units shipped | 100 million | October 2025 | Company-issued release carried by Chiplet Marketplace | Medium | Corroborates milestone wording | Customer and revenue attribution |
| Units shipped | More than 250 million | Q1 2026 | Company-issued financing release | Medium | Shows rapid volume ramp | Account count and repeat-order share |
| Units shipped | More than 250 million | Q1 2026 | Company-issued official page | Medium | Indicates scale after the 2025 milestone | Customer mix and economics |
| Automotive customer revenue growth | 436% annualized rate | Q1 2026 | Company-issued automotive program release | Medium | Signals automotive momentum | Starting base, absolute revenue, customer concentration |
| Factory production | Millions of units per day | October 2025 | Company-issued release | Medium | Supports high-throughput operating model | Capacity utilization and sell-through |
Values are not a common funnel: units, a growth rate, and a production-rate statement use different units and denominators. They must not be interpreted as conversion or retention rates.
[CU005, CU006, CU007, CU008, CU009]| Customer/reference | Segment | Deployment/use case | Production vs pilot | Outcome | Limitation |
|---|---|---|---|---|---|
| Unnamed automotive customers | Automotive | Co-development of automotive-grade packages for next-generation ADAS | Co-development; production status not stated | Program aligns packaging with safety, reliability, performance, and thermal requirements | Customer identities, SOP dates, and paid volume undisclosed |
| Unnamed early customers | Automotive, robotics, HPC, and AI | Early customer collaborations around panel-level packaging | Early-customer collaboration; mix not stated | Company says collaborations are yielding results at scale | No named references or independently audited outcomes |
| Imec Automotive Chiplet Program members | Automotive ecosystem | Interoperability, package development, and materials review | Consortium participation; not a customer deployment | Provides ecosystem and standards exposure | Imec membership is not evidence of customer revenue or retention |
This is a partial public-evidence enumeration, not an exhaustive customer list. The third row is ecosystem proof rather than a customer and is included to make that limitation explicit.
[CU003, CU004, CU008, CU009]Public evidence supports a journey from design consultation and automotive co-development to scaled packaging, but repeat-order and expansion stages remain unverified.
Stages are an analytical presentation of separately reported milestones, not a measured conversion funnel; public sources do not establish that every customer passes each stage.
[CU001, CU003, CU005, CU006, CU007, CU010, CU013]6.3 Retention, expansion, and concentration risk
No retained source supplies NRR, GRR, churn, renewal rates, contract duration, cohort behavior, customer concentration, or account-level revenue. The company says capacity is being expanded for growing demand and that automotive revenue grew at an annualized 436% rate in Q1 2026, but the denominator, starting base, and customer mix are not disclosed. A Tracxn profile reports 2024 revenue below US$1 million and separately describes the business as funded, but it does not provide customer retention evidence. The large-format factory and planned European site may support expansion across geographies and applications, yet they also increase the cost of underutilized capacity if qualification or demand slips. Investors should request a customer-by-customer revenue bridge, qualified-versus-production account list, backlog, renewal evidence, and top-ten concentration.[CU010, CU011, CU012, CU013]
6.4 Customer diligence conclusion
The evidence supports a technically credible manufacturing platform that has reached meaningful volume and participates in customer-facing automotive development. It does not support a precise customer count, durable retention conclusion, or concentration estimate. The central diligence gap is not whether Silicon Box can ship units; it is whether those units represent repeatable, paid production programs with diversified customers and acceptable economics. The adverse signal is that an independent account describes the technology as more complex and expensive to produce, which could lengthen qualification cycles and constrain the addressable buyer set. Until Silicon Box discloses named references or auditable cohort and revenue data, customer confidence should remain medium rather than high.[CU014, CU015, CU016]
6.5 Exhibits
07Risks
7.1 Risk posture and operating evidence
Silicon Box's strongest risk mitigant is demonstrated manufacturing execution rather than disclosed financial resilience. The company reported shipping 100 million units from its Singapore facility, which began mass production in late 2023, and reported ISO 9001:2015, ISO 14001:2015, and ISO 45001:2018 certifications across 2024 and 2025. These are company-issued statements and do not substitute for independent yield data, customer-level quality data, or audited financial statements. A TDK Ventures investment thesis also identified demonstrated production capability, high yield, technical expertise, and ecosystem building as key conditions for the investment. The main residual concern is that expansion to Italy and full Singapore capacity are forward-looking projects exposed to construction, capital, demand, and government-support risk.[CR001, CR002, CR003, CR004]
| Risk | Evidence | Likelihood | Severity | Mitigation maturity | Residual exposure | Monitoring / diligence path |
|---|---|---|---|---|---|---|
| Ramp and yield execution | 100M units shipped; company says high panel-scale yield | medium | high | Company-reported production and certifications | high | Obtain third-party yield and first-pass quality data by product and customer |
| Singapore capacity installation delay | Full capacity installation expected by 2028 | medium | high | Plan disclosed; independent schedule evidence unavailable | high | Track equipment installation, qualification lots, and capex against plan |
| Novara construction and commissioning | Reuters reports a €3.2B plant plan and unresolved site / aid approvals in 2024 | medium | critical | Government-backed project path but timing remains forward-looking | high | Verify permits, financing, site, construction contract, and commissioning gates |
| Demand shortfall | Company identifies changes in product demand as a risk | medium | high | Customer collaboration asserted; customer names and backlog unavailable | high | Require signed backlog, qualification funnel, and production-versus-pilot mix |
Company statements and third-party reporting are mixed; likelihood and residual exposure are analytical judgments tied to the cited evidence, not quantified probabilities.
[CR001, CR003, CR007, CR009]7.2 Legal, regulatory, and geopolitical exposure
The available record shows a live regulatory exposure rather than a disclosed enforcement event. The U.S. Bureau of Industry and Security's December 2024 interim final rule changed controls for advanced computing items, semiconductor manufacturing equipment, foreign-produced direct products, and high-bandwidth memory. For a Singapore-based advanced-packaging company serving AI, HPC, automotive, and other sectors, export classification, customer screening, technology transfer, and diversion controls are material diligence items. The company's own risk disclosure also names adverse legislative or government action, changes in incentives, and geopolitical trends as risks to its European plans. No assigned source establishes that Silicon Box itself has violated a rule; the appropriate conclusion is an unresolved compliance and supply-chain exposure.[CR005, CR006, CR007]
| Rule / exposure | Jurisdiction | Status | Likelihood | Severity | Mitigation | Residual exposure | Diligence path |
|---|---|---|---|---|---|---|---|
| Advanced semiconductor export controls | United States / extraterritorial scope | BIS interim final rule effective 2024-12-02 | medium | critical | Map products, tools, customers, and end uses to EAR controls | high | Obtain export-control classification and restricted-party screening records |
| Government incentives and approvals | Italy / European Union | Reuters said Commission approval was still needed in 2024 | medium | high | Development agreement and state-aid process are cited by later company material | high | Verify current aid decision, conditions, clawbacks, and financing |
| Automotive quality and certification | Europe / automotive customers | Imec reports an IATF 16949 Letter of Conformance and expected full certification | medium | high | Consortium participation and certification path | medium | Confirm certificate scope, audit findings, and customer PPAP / reliability acceptance |
| Undisclosed litigation or enforcement | Singapore / cross-border | No assigned source confirms an incident or enforcement action | 未知 | high | No public evidence in assigned pool | high | Obtain legal representation letter, litigation search, sanctions review, and material-contract schedule |
Absence of an incident in the assigned sources is not evidence that no incident exists; the final row is an explicit diligence gap.
[CR005, CR006, CR008, CR013]7.3 Dependencies, financial model risk, and kill criteria
Silicon Box's operating model is dependent on a small number of high-consequence milestones: customer qualification and demand, panel-level yield and reliability, suppliers and ecosystem partners, capital availability, and public support for the Italian project. Imec describes its Automotive Chiplet Program as a consortium with more than 22 partners and says Silicon Box is co-developing automotive-grade packages with customers; that is a useful ecosystem signal but not proof of production revenue or customer concentration. Public market and database records are inconsistent on financing and valuation, and the assigned evidence does not provide audited burn, cash, margins, or runway. Investors should therefore monitor measurable milestones and treat missed qualification, repeated quality incidents, export-control restrictions, or funding shortfalls as thesis-break triggers.[CR008, CR009, CR010, CR011, CR012, CR013]
| Dependency | Counterparty / role | Failure scenario | Severity | Current evidence | Mitigation maturity | Residual exposure | Diligence ask |
|---|---|---|---|---|---|---|---|
| Automotive ecosystem | imec ACP and more than 22 consortium partners | Standards, interoperability, or customer adoption slips | high | Silicon Box joined ACP; program targets automotive chiplets | medium | high | Obtain named customer milestones and interoperability test results |
| Italian government and EU support | Italian ministry / EU state-aid process | Aid delayed, conditioned, or withdrawn | critical | Reuters describes government-backed plan; later support claims remain forward-looking | medium | high | Review executed agreements, conditions, and funding sources |
| Specialized equipment and supply chain | Semiconductor equipment and materials ecosystem | Long lead times or export restrictions delay ramp | high | BIS controls create a relevant external constraint | low | high | Review supplier concentration, alternate sources, and lead-time buffers |
| Capital providers | Private investors and debt providers | Expansion requires more capital or refinancing | critical | Funding and valuation figures vary across database and investor sources | low | high | Obtain cap table, debt terms, cash, burn, runway, and committed capex |
Counterparty names and roles are limited to what the assigned sources identify; concentration and contractual protections remain unverified.
[CR005, CR008, CR009, CR010, CR011]The highest residual exposures are expansion financing and commissioning, export controls, and demand qualification.
Likelihood bands are qualitative analytical judgments from the cited public evidence; the matrix does not imply measured frequencies.
[CR005, CR007, CR009, CR013]7.4 Exhibits
08Valuation
8.1 Investment thesis and anti-thesis
The positive case is an advanced-packaging company that has moved beyond laboratory claims: the company reported 250 million units shipped by Q1 2026, while its 2025 release described mass production beginning in late 2023. A June 2026 debt facility and a concurrent US$150 million equity round provide evidence that capital providers are funding capacity expansion, not merely an R&D plan. The market backdrop is also supportive: Grand View Research estimates the global advanced-packaging market at US$43.9 billion in 2026 and US$66.0 billion in 2033. The anti-thesis is stronger for an entry decision: the assigned sources do not disclose audited revenue, gross margin, cash burn, runway, customer names, contract duration, or current post-money valuation. The only public valuation mark located is a historical US$1.55 billion figure, while Tracxn reports revenue below US$1 million as of December 31, 2023 and another profile reports US$1.87 million for the 2024 factory year. Those different periods and definitions make a revenue multiple unsuitable without diligence.[CV001, CV003, CV004, CV005, CV008, CV009, CV010, CV011]
| Dimension | Public evidence | Decision implication |
|---|---|---|
| Recommendation | Track / research-more | Do not underwrite a new price without current financial and term disclosure |
| Confidence | Medium-low | Production and financing evidence is stronger than valuation evidence |
| Risk rating | High | Capital intensity, debt, construction, customer and disclosure risks remain material |
| Valuation stance | Stretched / unverified | Historical US$1.55B mark lacks a current revenue denominator |
| Entry discipline | Require price and terms | Obtain audited statements, cap table, preferences, debt and customer contracts |
Assessment synthesizes the assigned public sources; no current term sheet or audited financial statements were available.
[CV001, CV003, CV004, CV005, CV006, CV008, CV009, CV010, CV016]| Argument | Supporting evidence | What would change the view |
|---|---|---|
| High-volume execution is plausible | More than 250M units reported by Q1 2026 | Independent customer or production records and audited shipment-to-revenue reconciliation |
| Financing validates strategic relevance | US$150M Series B2 plus SGD100M debt announced in June 2026 | Current valuation, debt covenants, and investor underwriting rationale |
| Market growth supports demand | Advanced packaging estimated at US$43.9B in 2026 and US$66.0B in 2033 | Silicon Box share, backlog, utilization and margin evidence |
| Price may be too high | Historical US$1.55B mark versus sub-US$1M or US$1.87M reported revenue figures | Audited current revenue, gross margin, and a market-clearing transaction price |
| Expansion can amplify downside | Full Singapore capacity installation and Italy production are described for 2028 | Permits, construction budget, funding plan, and return-on-capital case |
The two revenue figures come from different third-party profiles and periods/definitions; they are not treated as interchangeable.
[CV003, CV004, CV005, CV006, CV008, CV009, CV010, CV011, CV014, CV016]8.2 Financing context and entry discipline
The June 2026 financing is strategically useful but not equivalent to equity value: Silicon Box announced SGD100 million of debt from Ares Management, InnoVen Capital, January Capital Growth Credit, and Abound Capital, with an option to upsize by an additional US$75 million. TechNode reports the facility followed a completed US$150 million Series B2 equity round and says proceeds are intended for capacity expansion. Debt can extend the build-out without immediate shareholder dilution, but it creates repayment, covenant, and refinancing exposure that cannot be assessed from the public record. The historical US$1.55 billion mark should therefore be treated as an unrefreshed reference point, not a current fair value. A disciplined entry would require a verified latest post-money valuation, primary-versus-secondary split, liquidation preferences, debt terms, cash balance, and a bridge from installed capacity to paid revenue. Without those inputs, a price target or target return would be false precision.[CV001, CV002, CV003, CV005, CV007, CV008, CV009, CV010, CV014]
| Scenario | Explicit assumptions | Valuation or return logic | Probability signal | Downside trigger |
|---|---|---|---|---|
| Bull | Shipments convert to diversified paid programs; capacity installs on schedule; market grows | Historical mark is supported or exceeded only after audited revenue and margin proof | Low-to-medium; milestones are partly company-reported | Revenue, utilization or cash conversion lags unit growth |
| Base | Technical execution continues; commercial conversion and margins remain opaque | Hold/track; require a material valuation reset or verified economics before entry | Medium; best fit to current evidence | No customer-level bookings or audited financial bridge |
| Bear | Debt service, construction delay, concentration or added capital needs impair returns | Down-round or preference-adjusted equity value could be materially below historical mark | Medium; disclosure gaps prevent quantification | Covenant stress, delayed plant, or failed commercialization |
| Catalyst | Audited statements, signed customer contracts and current financing terms arrive | Re-underwrite using revenue/margin and preference-adjusted scenarios | Unresolved; diligence-dependent | Evidence remains promotional and non-audited |
| Exit readiness | Singapore scale and planned Europe footprint become cash-generative | Strategic or public-market exit is plausible only with repeatable margins | Low today; no exit filing or transaction evidence | Capital intensity remains ahead of cash generation |
Scenario logic is an analytical framework, not a disclosed company forecast; no probability-weighted valuation is calculated because the public denominator is incomplete.
[CV004, CV005, CV006, CV008, CV009, CV010, CV011, CV014, CV016]8.3 Scenarios, comparables, and exit readiness
A scenario framework is more decision-useful than a single multiple because the public evidence supports operating milestones but not an investable earnings base. The bull case assumes the reported shipment ramp converts into repeat, diversified paid programs, capacity installs on schedule, and the market expands as forecast; the base case assumes technical execution continues but commercial conversion and margins remain unproven; the bear case assumes capital intensity, debt service, construction delay, or customer concentration prevents adequate returns. Independent market-research sources identify Amkor, ASE, TSMC, Intel, Samsung, and JCET as major advanced-packaging players, while Macrotrends reports an Amkor snapshot of US$12.2 billion market capitalization and US$6.318 billion revenue as of February 6, 2026. That roughly 1.9x ratio is only a scale reference: Amkor is a mature public OSAT, whereas Silicon Box is private and its current revenue and profitability remain unverified. No defensible transaction multiple is disclosed in the assigned pool. Exit readiness is consequently conditional on audited financial reporting, customer references, capacity utilization, and evidence that the Singapore and planned European footprints generate acceptable returns on invested capital.[CV005, CV006, CV011, CV012, CV013, CV016]
Production proof and financing support the thesis, while missing price and economics evidence constrain the recommendation.
部分连接的端点缺失或存在歧义。未能确定的标识符按原文展示,不推测对应节点。
| 节点 / 连接 | 节点 / 起点 | 终点 | 说明 |
|---|---|---|---|
| 节点 1 | Scale proof [scale] | More than 250M units reported by Q1 2026 | |
| 节点 2 | Financing [financing] | US$150M equity plus SGD100M debt announced in June 2026 | |
| 节点 3 | Market [market] | Advanced packaging market estimate: US$43.9B in 2026 | |
| 节点 4 | Valuation opacity [opacity] | No current valuation, audited revenue, margin or cap-table terms | |
| 节点 5 | Risk adjustment [risk] | Capital intensity, debt, construction and customer concentration | |
| 节点 6 | Decision [decision] | Track / research-more pending price and term diligence | |
| 连接 1 | — | — | |
| 连接 2 | — | — | |
| 连接 3 | — | — | |
| 连接 4 | — | — | |
| 连接 5 | — | — |
8.4 Diligence asks and thesis-break triggers
The next diligence round should test price, not just product quality. Request audited 2024–2026 financial statements, monthly cash burn and runway, a round-by-round cap table, preference stack, debt agreement and covenants, customer-level bookings and production versus pilot mix, gross-margin bridge by package, and signed capacity commitments. Track whether the 2028 Singapore capacity-installation and Novara production milestones remain on schedule, whether reported unit growth is accompanied by revenue and cash collection, and whether the company can finance expansion without a down round or punitive debt refinancing. A thesis break occurs if production milestones fail to convert to paid revenue, if customer concentration prevents sustainable utilization, if expansion requires materially more capital than disclosed, or if current financing terms reveal senior claims that leave common-equity upside below the historical mark.[CV004, CV005, CV006, CV008, CV009, CV010, CV014, CV016]
8.5 Exhibits
免责声明
This report is an evidence-led diligence assessment, not investment advice or an independent valuation. Private-company figures and company-reported milestones may be incomplete or unaudited.
证据索引
| 编号 | 陈述 | 可信度 | 来源 |
|---|---|---|---|
| CO001 | Silicon Box is a Singapore-based semiconductor packaging company founded in 2021. | 中 | SO003, SO006, SO008 |
| CO002 | The company describes its operating model as end-to-end chiplet integration and manufacturing using proprietary SiPlet panel-level packaging with sub-5-micron interconnects. | 中 | SO003, SO005, SO008, SO012 |
| CO003 | Silicon Box's Tampines facility began mass production in late 2023. | 中 | SO005, SO007 |
| CO004 | The company-issued 2025 milestone release reported 100 million units shipped from the Singapore facility by 2025-10-15. | 中 | SO005, SO007, SO011 |
| CO005 | Byung Joon (BJ) Han, Sehat Sutardja and Weili Dai are identified as Silicon Box co-founders. | 中 | SO005, SO007, SO008 |
| CO006 | Byung Joon (BJ) Han is identified as Silicon Box's co-founder and CEO. | 中 | SO003, SO006 |
| CO007 | Tracxn's October 2026 profile lists five active Silicon Box board members, including founders and two independent board members. | 中 | SO006 |
| CO008 | The retained public evidence does not disclose board committee responsibilities, control rights or a complete succession plan. | 低 | |
| CO009 | Tracxn reports US$658 million of total funding across seven Silicon Box rounds and a US$77.7 million conventional-debt round dated 2026-06-09. | 中 | SO006 |
| CO010 | A June 2026 financing report describes S$100 million, approximately US$77.65 million, of debt financing and a US$75 million upsizing option. | 中 | SO001, SO002, SO004 |
| CO011 | The assigned evidence contains conflicting lifetime-funding totals and valuation figures, including a US$1.55 billion private valuation in a company-profile source. | 中 | SO003, SO006 |
| CO012 | Revenue, profitability, cash burn, cash on hand, runway and named-customer counts are not disclosed in the assigned evidence as audited company metrics. | 低 | |
| CO013 | The European Commission approved an approximately €1.3 billion Italian state-aid measure for a Silicon Box Novara facility with a total investment of €3.2 billion. | 中 | SO010 |
| CO014 | The European Commission said the Novara facility was expected to be at full capacity in 2033 and process approximately 10,000 panels per week. | 中 | SO010 |
| CO015 | Silicon Box's 2025 company-issued release lists construction delays, higher capital requirements, insufficient ecosystem support and adverse government action among risks to its forward-looking expansion plans. | 中 | SO007, SO011 |
| CO016 | TrendForce reports that Intel is pursuing major advanced-packaging customers while expanding packaging capacity in Malaysia and New Mexico. | 中 | SO009 |
| CM001 | The relevant market is advanced semiconductor packaging and chiplet-integration services that go beyond traditional wire-bond methods and enable higher density, performance, or integration at package level. | 中 | SM005, SM008 |
| CM002 | Panel-level packaging is a platform within the broader advanced-packaging market rather than the whole market. | 中 | SM005, SM001, SM003 |
| CM003 | Monolithic architectures and conventional wafer-level or substrate packages remain status-quo substitutes for chiplet and panel-level packaging. | 中 | SM001, SM002, SM004 |
| CM004 | Mordor estimates the advanced-packaging market at USD 51.62 billion in 2025, USD 57.46 billion in 2026, and USD 90.11 billion in 2031, with a 9.42% CAGR from 2026 to 2031. | 中 | SM005 |
| CM005 | Mordor projects panel-level packaging to expand at a 25.58% CAGR through 2031. | 中 | SM005 |
| CM006 | Deloitte estimates the AI-chip market at about US$500 billion in 2026. | 中 | SM006 |
| CM007 | McKinsey frames the broader global semiconductor market as potentially exceeding US$1 trillion by 2030, up from US$600 billion in 2021. | 中 | SM008 |
| CM008 | AI and HPC buyers have a strong adoption trigger because dense memory and die-to-die connections create performance and capacity requirements that advanced packaging addresses. | 高 | SM004, SM007 |
| CM009 | Automotive and EV applications are a distinct buyer segment with reliability and thermal requirements that support advanced-packaging adoption. | 中 | SM005, SM002 |
| CM010 | Silicon Box's cited application set includes AI, HPC, automotive, mobile, IoT, and robotics rather than one single end market. | 中 | SM002 |
| CM011 | SemiAnalysis identifies CoWoS and HBM capacity as bottlenecks for leading-edge AI accelerator supply. | 中 | SM007 |
| CM012 | Mordor states that capital intensity above USD 500 million per panel-level line and rapid depreciation can compress margins and make financing difficult without customer prepayments. | 中 | SM005 |
| CM013 | The assigned evidence does not disclose Silicon Box customer names, contracted capacity, package pricing, or production-versus-pilot mix. | 低 | |
| CM014 | Silicon Box stated that it had shipped 500 million units from its Singapore factory by August 5, 2026. | 中 | SM001 |
| CM015 | Silicon Box stated that it planned to increase production capacity tenfold within 2026 and expected to reach 1.5 billion shipped units in early Q4. | 中 | SM001 |
| CM016 | Published unit shipments and capacity plans do not identify package pricing, customer concentration, or the share of demand that is contractually committed. | 低 | SM001 |
| CP001 | Tracxn identifies Amkor, RRP Electronics, HANA Micron, UTAC, Unisem, and KYEC Group among Silicon Box's competitor set. | 中 | SP004 |
| CP002 | Tracxn describes Silicon Box as a semiconductor packaging company delivering chiplet design consultation through final manufacturing. | 中 | SP004 |
| CP003 | Tracxn reports Amkor as a public outsourced semiconductor packaging and test provider founded in 1968. | 中 | SP004 |
| CP004 | Tracxn reports RRP Electronics with $56.4M funding and describes it as a semiconductor assembly, testing, and packaging provider. | 中 | SP004 |
| CP005 | Silicon Box's 2025 company release states that its Singapore facility produces advanced panel-level packaging exclusively. | 中 | SP003, SP005 |
| CP006 | Silicon Box's 2025 company release states that the facility shipped 100 million units and had exceeded a prior 99.7% wafer-scale yield track record. | 中 | SP003, SP005 |
| CP007 | An independent report states that Amkor's Q1 2025 computing revenue increased 21% year-over-year, driven partly by AI-GPU engagements using 2.5D technology. | 中 | SP008 |
| CP008 | An independent report states that ASE's leading-edge advanced packaging services represented 10% of ATM revenue in Q1 2025, versus 6% for full-year 2024. | 中 | SP008 |
| CP009 | No assigned source publishes comparable realized pricing or discount terms for Silicon Box, Amkor, ASE, TSMC CoWoS, Intel alternatives, or internal build. | 低 | |
| CP010 | TDK Ventures identifies chiplet interconnect innovation, large-format high-yield production, technical expertise, and investor partnership as its four indicators for a chiplet-packaging solution. | 中 | SP006 |
| CP011 | Electronics Weekly reports that 2.5D packaging capacity remained in short supply and that SPIL and Amkor benefited from spillover demand. | 中 | SP007 |
| CP012 | Electronics Weekly reports that Intel's EMIB and FOEB alternatives were gaining traction while Intel leveraged a US-based manufacturing advantage. | 中 | SP007 |
| CP013 | TechPowerUp reports that TSMC's CoWoS-L packaging integrates a redistribution layer with a partial silicon interposer and enables more HBM stacking. | 中 | SP009 |
| CP014 | Silicon Box's 2026 company release states that it planned to increase production capacity by a factor of ten within 2026. | 中 | SP002 |
| CI001 | Silicon Box reported shipping 100 million units from its Singapore Tampines facility by October 15, 2025. | 中 | SI001 |
| CI002 | Cleanroom Technology reports that the Italian government confirmed €1.3 billion in funding for Silicon Box's planned northern Italy facility. | 中 | SI009 |
| CI003 | A third-party company profile reports US$1.87 million of 2024 production revenue from pre-qualified customers and R&D. | 中 | SI006 |
| CI004 | Public sources in this pool do not identify Silicon Box customers or disclose a revenue mix by application. | 中 | SI001, SI004, SI006, SI008 |
| CI005 | Silicon Box markets panel-level packaging as addressing cost and scalability challenges in wafer-level and traditional packaging schemes. | 中 | SI001 |
| CI006 | No assigned source discloses Silicon Box list pricing, realized pricing, discounts, gross margin, CAC or payback. | 低 | |
| CI007 | Silicon Box reported a historical wafer-scale yield benchmark of 99.7% in its October 2025 release. | 中 | SI001 |
| CI008 | The available evidence does not quantify cleanroom, materials, test, utility, labor or depreciation costs per good unit. | 低 | |
| CI009 | Silicon Box announced SGD100 million of debt financing in June 2026 with an option to upsize by an additional US$75 million. | 中 | SI002 |
| CI010 | Silicon Box said the June 2026 debt financing followed a US$150 million Series B2 equity round. | 中 | SI002 |
| CI011 | A legal-sector report describes US$100 million, US$150 million and S$100 million Silicon Box equity and debt transactions. | 中 | SI007 |
| CI012 | External coverage describes the planned Novara facility as a €3.2 billion project with initial production targeted for 2028. | 中 | SI006, SI009, SI010 |
| CI013 | Silicon Box has not publicly disclosed cash on hand, monthly burn, runway, debt maturity, interest rate or debt covenants in the assigned sources. | 低 | |
| CI014 | The June 2026 financing release says debt proceeds will be deployed for capacity expansion. | 中 | SI002 |
| CI015 | Silicon Box's syndicated October 2025 release identifies demand changes, construction delays, increased capital requirements, government-support changes and insufficient ecosystem support as risks to forward-looking plans. | 中 | SI011 |
| CI016 | The assigned evidence supports a capital-backed manufacturing scale-up but is insufficient to establish profitability or runway. | 中 | SI001, SI002, SI004, SI006, SI007 |
| CE001 | Silicon Box provides end-to-end semiconductor integration services spanning chiplet design consultation through final manufacturing. | 中 | SE003 |
| CE002 | Silicon Box's core manufacturing proposition is advanced panel-level packaging for chiplet integration rather than only conventional wafer-oriented packaging. | 中 | SE001, SE008 |
| CE003 | The company's Singapore panels are reported by The Business Times to have more than six times the productive area of standard 300 mm wafers. | 中 | SE008 |
| CE004 | Public descriptions position the offering for AI, high-performance computing, automotive, mobile, Internet of Things, and robotics applications. | 中 | SE001, SE002 |
| CE005 | The Tampines facility began mass production in late 2023. | 中 | SE001 |
| CE006 | Silicon Box reported shipping 100 million units from Singapore in October 2025 and 500 million units in August 2026. | 中 | SE001, SE002 |
| CE007 | Silicon Box states that the Singapore facility is undergoing a US$300 million expansion and that full capacity installation is expected by 2028. | 中 | SE002 |
| CE008 | Silicon Box states that a second manufacturing facility in Novara, Italy, is expected to begin production in 2028 with native test capability. | 中 | SE001, SE002 |
| CE009 | Public reporting says the Tampines operation achieved ISO 9001:2015 certification in 2024 and ISO 14001:2015 and ISO 45001:2018 certifications in 2025. | 中 | SE001 |
| CE010 | The UCIe consortium describes an open ecosystem of chiplets for on-package innovations, establishing interoperability as a relevant ecosystem requirement but not Silicon Box compliance. | 中 | SE006 |
| CE011 | The assigned patent listing shows Byung Joon Han associated with inventions covering embedded wafer-level chip-scale packages, standardized carriers, and integrated-circuit packaging with shielding. | 中 | SE007 |
| CE012 | A Silicon Box release carried by AutomotiveWorld says the company joined imec's Automotive Chiplet Program and would contribute expertise in chiplet interconnection architecture, package development, and testing. | 中 | SE009 |
| CE013 | Public evidence does not independently establish Silicon Box's reported yield, product-level reliability, UCIe compliance, full automotive certification, or customer acceptance outcomes. | 低 | |
| CE014 | Tracxn describes Silicon Box's proprietary SiPlet process as using sub-5-micron interconnect density for panel-scale chiplet integration. | 中 | SE003 |
| CE015 | Investor TDK Ventures characterizes Silicon Box's differentiation as combining panel packaging with short chiplet-to-chiplet interconnections. | 中 | SE004 |
| CU001 | Silicon Box describes its customer offering as end-to-end chiplet design consultation through final manufacturing and testing. | 中 | SU007 |
| CU002 | Silicon Box publicly targets automotive, AI, HPC, mobile, IoT, robotics, and space applications. | 中 | SU003, SU005, SU011 |
| CU003 | Silicon Box says it is co-developing automotive-grade chiplet packages with unnamed customers for next-generation ADAS. | 中 | SU005 |
| CU004 | Silicon Box says its production and technology collaborations are yielding results for early customers in automotive, robotics, HPC, and AI applications. | 中 | SU004 |
| CU005 | Silicon Box reported shipping 100 million units from its Singapore factory in October 2025. | 中 | SU003, SU004 |
| CU006 | Silicon Box said its June 2026 financing would fund capacity expansion to meet growing market demand. | 中 | SU001 |
| CU007 | Silicon Box reported shipping more than 250 million units at near-perfect yield from its flagship Singapore facility as of Q1 2026. | 中 | SU001 |
| CU008 | Silicon Box said automotive customer revenue grew at an annualized rate of 436% in the first quarter of 2026. | 中 | SU005 |
| CU009 | Silicon Box said its automotive program included interoperability, packaging, materials, safety, reliability, performance, and thermal requirements. | 中 | SU005 |
| CU010 | The assigned source pool does not provide Silicon Box's net revenue retention, gross revenue retention, churn, or renewal rate. | 低 | |
| CU011 | The assigned source pool does not provide a customer count or customer-by-customer revenue concentration for Silicon Box. | 低 | |
| CU012 | Tracxn reports Silicon Box annual revenue below US$1 million as of December 31, 2023. | 中 | SU007 |
| CU013 | Silicon Box has not publicly disclosed the share of shipped units attributable to paid production programs versus pilots, qualification, or R&D in the assigned pool. | 低 | |
| CU014 | An independent trade publication reported that some experts view chiplet technology as more complex and expensive to produce. | 中 | SU009 |
| CU015 | The European Commission granted Open EU Foundry status to Silicon Box's planned Novara facility. | 中 | SU010 |
| CU016 | The public evidence supports scaled manufacturing and customer collaboration but does not establish durable retention or diversified customer economics. | 中 | SU001, SU005, SU009 |
| CR001 | Silicon Box reported shipping 100 million units from its Singapore flagship facility. | 中 | SR001, SR009, SR011 |
| CR002 | Silicon Box reported ISO 9001:2015 certification in 2024 and ISO 14001:2015 and ISO 45001:2018 certifications in 2025. | 中 | SR001 |
| CR003 | Silicon Box stated that full capacity installation at its Singapore facility is expected by 2028. | 中 | SR001, SR011 |
| CR004 | TDK Ventures described demonstrated production capability, high yield, technical expertise, and ecosystem building as investment-thesis indicators for Silicon Box. | 中 | SR004 |
| CR005 | The BIS interim final rule effective December 2, 2024 added or refined controls affecting advanced computing, semiconductor manufacturing equipment, foreign-produced direct products, and related technologies. | 中 | SR007 |
| CR006 | The BIS rule states that an accompanying Entity List rule modifies controls to minimize diversion risk to entities of concern. | 中 | SR007 |
| CR007 | Silicon Box's assigned company-issued risk disclosure identifies demand changes, construction delays, increased capital requirements, adverse government actions, insufficient ecosystem support, and macroeconomic or geopolitical events as risks. | 高 | SR001, SR002 |
| CR008 | Imec reported that Silicon Box joined its Automotive Chiplet Program and that the program connects more than 22 partners across the automotive and semiconductor ecosystems. | 中 | SR002 |
| CR009 | Reuters reported an Italian plant plan whose site and European Commission approval for planned financial aid were unresolved in March 2024, while imec later described the European facility and government-support path as forward-looking. | 高 | SR003, SR002 |
| CR010 | Tracxn reported a $77.7 million conventional debt round dated June 9, 2026 and total funding of $658 million over seven rounds. | 中 | SR005 |
| CR011 | A separate market-data profile reported a $1.55 billion valuation dated August 5, 2024. | 低 | SR006 |
| CR012 | The assigned evidence does not disclose audited cash, burn, runway, gross margin, or customer concentration for Silicon Box. | 低 | |
| CR013 | The assigned source pool contains no confirmed Silicon Box litigation, enforcement action, outage, or security incident. | 低 | |
| CV001 | Silicon Box's official June 2026 release reports a SGD100 million debt facility from Ares Management, InnoVen Capital, January Capital Growth Credit, and Abound Capital. | 中 | SV006, SV001 |
| CV002 | The official release says the debt facility included an option to upsize by an additional US$75 million. | 中 | SV006, SV001 |
| CV003 | The June 2026 financing followed a completed US$150 million Series B2 equity round. | 中 | SV001, SV006 |
| CV004 | Silicon Box reported shipment of more than 250 million units from its Singapore facility by Q1 2026. | 中 | SV006, SV001 |
| CV005 | The assigned public sources reviewed do not disclose a current 2026 equity valuation, liquidation preferences, debt covenants, or fully diluted ownership. | 中 | SV001, SV002, SV006, SV007 |
| CV006 | The assigned public sources describe full capacity installation at the Singapore facility and production at a planned Italy facility as expected in 2028. | 中 | SV003, SV004 |
| CV007 | Tracxn reports that Silicon Box raised US$658 million across seven rounds. | 中 | SV002 |
| CV008 | Silicon Valley Investclub lists a US$1.55 billion valuation dated August 5, 2024. | 中 | SV007 |
| CV009 | Silicon Valley Investclub reports 2024 factory-year revenue of US$1.87 million. | 中 | SV007 |
| CV010 | Tracxn reports annual revenue below US$1 million as of December 31, 2023. | 中 | SV002 |
| CV011 | Grand View Research estimates the advanced-packaging market at US$43.9 billion in 2026 and US$66.0 billion in 2033, implying a 6.0% 2026–2033 CAGR. | 中 | SV010 |
| CV012 | Grand View Research identifies Amkor Technology, ASE, TSMC, Intel, Samsung, and JCET among key advanced-packaging companies. | 高 | SV010, SV009 |
| CV013 | Macrotrends reports Amkor market capitalization of US$12.2 billion and revenue of US$6.318 billion as of February 6, 2026. | 中 | SV008 |
| CV014 | Silicon Box says financing proceeds will be deployed for capacity expansion to meet growing market demand. | 中 | SV006, SV001 |
| CV015 | The TDK Ventures investment thesis identifies chiplet interconnect performance, production capability, technical expertise, and investor partnership as key indicators. | 中 | SV005 |
| CV016 | Intel Market Research says a dedicated advanced-packaging line requires multi-billion-dollar investment and that smaller entrants can lack the necessary financial capacity. | 中 | SV009 |
| 编号 | 出版方 | 标题 | 引文 |
|---|---|---|---|
| SO001 | Ultimate Computer Software | Silicon Box Lands $78M to Scale Advanced Chip Packaging | Silicon Box has secured S$100 million (approximately US$77.65 million) in debt financing from a consortium of prominent institutional investors |
| SO002 | Entrepreneur News Network | Silicon Box Secures US$77.5 Million Debt Funding to Expand Advanced Semiconductor Packaging Business | Since entering high-volume production in 2025, Silicon Box has reported significant operational growth. |
| SO003 | Silicon Valley Investclub | Silicon Box | |
| SO004 | DealStreetAsia | Singapore's Silicon Box secures $78m debt financing | |
| SO005 | Chiplet Marketplace | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | |
| SO006 | Tracxn | Silicon Box | Silicon Box has raised a total funding of$658M over 7 round s. |
| SO007 | Newswire.com | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | This report contains forward-looking statements that involve a number of risks and uncertainties. |
| SO008 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging | In 2021, Dr. Sutardja, Ms. Weili Dai (co-founder of Marvell Technology) and Dr. Byung Joon Han (previous Chairman and CEO of STATS ChipPAC) together founded Silicon Box |
| SO009 | TrendForce | Intel Advanced Packaging Reportedly Gains Traction vs. TSMC | |
| SO010 | European Commission | Commission approves €1.3 billion Italian State aid measure to support Silicon Box in setting up a new semiconductor advanced packaging facility | The aid will take the form of an approximately €1.3 billion direct grant to Silicon Box to support its investment worth €3.2 billion in total. |
| SO011 | Access Newswire | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | |
| SO012 | Auto Connected Car News | Connected Car News: Silicon Box joins imec Automotive Chiplet Program | |
| SM001 | Chiplet Marketplace | Silicon Box Ships 500M Units at High Yield, Expands Production Capacity for Panel-Level Packaging | Silicon Box addresses performance, scalability and cost challenges in wafer-level and monolithic chip architectures by enabling chiplet-based semiconductors on a large panel-level manufacturing scheme. |
| SM002 | Newswire.com | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | The state-of-the-art facility, which began mass production in late 2023, produces advanced panel-level packaging (PLP) exclusively and is the largest of its kind globally in terms of production capacity. |
| SM003 | Tracxn | Silicon Box - 2026 Company Profile & Team | A semiconductor packaging company specializing in chiplet integration and panel-level packaging technology. |
| SM004 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging | Chiplet concept represents a groundbreaking shift in semiconductor IC design, offering advantages that cater to the evolving demands of the technology industry. |
| SM005 | Mordor Intelligence | Advanced Packaging Market Size, Trends & Outlook, 2031 | The advanced packaging market size is expected to grow from USD 51.62 billion in 2025 to USD 57.46 billion in 2026 and is forecast to reach USD 90.11 billion by 2031 at 9.42% CAGR over 2026-2031. |
| SM006 | Deloitte Insights | 2026 Global Semiconductor Industry Outlook | Deloitte now estimates that the AI chip market in 2026 will be about US$500B. |
| SM007 | SemiAnalysis | AI Capacity Constraints – CoWoS and HBM Supply Chain | With GPU demand exploding, these are the parts of the supply chain that just cannot keep up and are bottlenecking GPU supply. |
| SM008 | McKinsey & Company | Advanced chip packaging: How manufacturers can play to win | The global market for semiconductors could reach more than $1 trillion by 2030, up from $600 billion in 2021. |
| SP001 | Troy-Technical | Silicon Box Secures $77.5M to Scale Advanced Packaging and Chiplet Integration | Silicon Box distinguishes itself by specializing in chiplet architecture and proprietary advanced packaging technology. |
| SP002 | PRLog | Silicon Box Ships 500M Units at High Yield, Expands Production Capacity for Panel-Level Packaging | Silicon Box addresses performance, scalability and cost challenges in wafer-level and monolithic chip architectures by enabling chiplet-based semiconductors on a large panel-level manufacturing scheme. |
| SP003 | Chiplet Marketplace | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | The state-of-the-art facility, which began mass production in late 2023, produces advanced panel-level packaging (PLP) exclusively and is the largest of its kind globally in terms of production capacity. |
| SP004 | Tracxn | Silicon Box - 2026 Company Profile & Team | Silicon Box has raised a total funding of$658M over 7 round s. |
| SP005 | Newswire.com | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | Silicon Box, a global leader in chiplet integration and advanced semiconductor packaging, announced it has shipped 100-million-units from its flagship factory in Singapore's Tampines Wafer Park. |
| SP006 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging Future | Innovation in chiplet-to-chiplet interconnect that improves the performance and reduces the cost. |
| SP007 | Electronics Weekly | Capacity constraints | OSAT providers such as SPIL and Amkor have benefited from this spillover demand and alternative technologies like EMIB and FOEB are also gaining traction, with Intel leveraging its US-based manufacturing advantage. |
| SP008 | Mark LaPedus | Packaging, Test Firms Post Mixed Results In Q1 '25 | Nonetheless, it’s important to keep tabs on the leading outsourced semiconductor assembly and test (OSAT) vendors, which specialize in providing third-party packaging and testing services for customers. |
| SP009 | TechPowerUp | TSMC Reserves 70% of 2025 CoWoS-L Capacity for NVIDIA | CoWoS-L packaging technology enhances chip size and area by increasing transistor density, enabling the stacking of more high-bandwidth memory (HBM). |
| SI001 | Silicon Box | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | Silicon Box, a global leader in chiplet integration and advanced semiconductor packaging, announced it has shipped 100-million-units from its flagship factory in Singapore's Tampines Wafer Park. |
| SI002 | Silicon Box | Silicon Box Secures SGD 100M Financing to Accelerate Growth in Advanced Packaging | The facility includes an option to upsize by an additional USD 75 million. |
| SI004 | Tracxn | Silicon Box - 2026 Company Profile & Team | Silicon Box has raised a total funding of$658M over 7 round s. |
| SI005 | Wikipedia | Silicon Box | In January 2024, it was reported that the company had successfully raised US$200 million at a total valuation of over US$1 billion in a series B fundraising round. |
| SI006 | Silicon Valley Investclub | Silicon Box — $1.55B · CEO Byung Joon Han | First-year production revenue in 2024 was US$1.87 million from pre-qualified customers and R&D. |
| SI007 | WongPartnership | WongPartnership Advised Silicon Box on US$228 Million Equity and Debt Financing | These transactions included the US$100 million Series B2 funding round in 2024, US$150 million Series B2 extension funding round, and S$100 million debt financing (with an accordion option) from leading institutional investors. |
| SI008 | Silicon Box (syndicated by Semiconductor Digest) | Silicon Box Announces Plans to Join Imec Automotive Chiplet Program | Revenue from automotive customers grew at an annualized rate of 436% in the first quarter of 2026, highlighting the importance of the automotive sector to the company’s burgeoning business. |
| SI009 | Cleanroom Technology | Silicon Box chooses Stantec for first semiconductor facility in Italy | The plant is expected to be operating at full capacity in 2033, processing approximately 10,000 panels per week. |
| SI010 | Decode39 | Singapore’s Silicon Box plans €3.2B chip factory in Northern Italy | Silicon Box recently announced plans to invest €3.2 billion in building a microchip factory in Novara, a city in the Piedmont region in northwest Italy, to the west of Milan. |
| SI011 | Silicon Box (via Newswire.com) | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | Such statements involve risks and uncertainties that could cause our actual results to differ materially from those expressed or implied, including: changes in demand for our products; Silicon Box's failure to realize the anticipated benefits of its strategy, plans, and proposed transactions; construction delays or changes in plans due to business, economic, or other factors; increases in capital requirements and changes in capital investment plans; adverse changes in anticipated government incentives and associated approval related to Silicon Box's planned EU investments; adverse legislative or other government actions; insufficient ecosystem support; the impact of macroeconomic and geopolitical trends and events; and other risks and uncertainties described in this press release. |
| SE001 | TechPowerUp | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | The Tampines factory had its grand opening in July 2023, with mass production starting later that year. In 2024, the facility achieved ISO 9001:2015 certification, followed by ISO 14001:2015 and ISO 45001:2018 certifications in 2025. |
| SE002 | Digital Journal / PRZen | Silicon Box Ships 500M Units at High Yield, Expands Production Capacity for Panel-Level Packaging | Silicon Box, a global leader in chiplet integration and advanced semiconductor packaging, has shipped 500 million units from its flagship Singapore factory, a fivefold increase since October last year, while maintaining industry-beating yield. |
| SE003 | Tracxn | Silicon Box | A semiconductor packaging company specializing in chiplet integration and panel-level packaging technology. The company delivers end-to-end semiconductor integration services, from chiplet design consultation through final manufacturing. The company's core differentiator is its proprietary SiPlet panel-level packaging technology with sub-5-micron interconnect density, which enables chiplet integration at panel scale rather than traditional wafer scale. |
| SE004 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging | Silicon Box has wasted no time in becoming the “King of the Hill” innovator through their chiplet development and packaging solutions. Their ingenious technology distinguishes itself in two key aspects: (1) an industry-best interconnection, and (2) novel panel packaging instead of the standard wafer approach. |
| SE006 | Universal Chiplet Interconnect Express Consortium | Universal Chiplet Interconnect Express | Building an open ecosystem of chiplets for on-package innovations |
| SE007 | Justia Patents | Patents by Inventor Byung Joon Han | Byung Joon Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO). |
| SE008 | The Business Times | Square chips on square panels – Silicon Box aims to break supply chain bottleneck with novel technology | The Singapore startup currently packages square chips on square panels that have more than six times the productive area of standard 300 mm wafers. |
| SE009 | AutomotiveWorld | Silicon Box joins imec consortium on automotive chiplets | Silicon Box has joined imec’s Automotive Chiplet Program, a research consortium of more than 22 partners spanning vehicle manufacturers, Tier 1 suppliers, and semiconductor companies. |
| SU001 | Silicon Box | Silicon Box Secures SGD 100M Financing to Accelerate Growth in Advanced Packaging | Since its first high-volume manufacturing announcement last year, Silicon Box, as of Q1 2026, has achieved significant commercial traction, including the shipment of over 250 million units at near-perfect yield from its flagship Singapore manufacturing facility. |
| SU002 | PACKNODE Packaging | Silicon Box Ships 100M Units, Validates Panel-Level Packaging for AI and HPC at Scale | Silicon Box, a Singapore-based pioneer in advanced semiconductor packaging, has achieved a major milestone: the shipment of 100 million panel-level packaged (PLP) units from its flagship Tampines Wafer Park facility. |
| SU003 | Chiplet Marketplace | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | Silicon Box's proprietary technology is able to support chiplet integration by addressing challenges in performance, scalability and costs in wafer-level and traditional packaging schemes. |
| SU004 | Newswire.com | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | This report contains forward-looking statements that involve a number of risks and uncertainties. |
| SU005 | Silicon Box | Silicon Box Announces It Joins imec Automotive Chiplet Program | Silicon Box is already co-developing chiplet-based automotive-grade packages with customers for next-generation advanced driver assistance systems (ADAS). |
| SU007 | Tracxn | Silicon Box | Silicon Box has 238 employees as of Sep 26. |
| SU008 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging | Leveraging our deep explorations, we developed an investment thesis contingent on four crucial “King of the Hill” indicators for chiplet/chiplet packaging solutions: |
| SU009 | Communications Today | Tata boosts semiconductor portfolio with Singapore's Silicon Box investment | However, some experts say the technology is more complex and expensive to produce. |
| SU010 | European Commission | Open EU Foundry status granted to innovative chiplet facility | The Commission has granted the Open EU Foundry (OEF) status to Silicon Box in Novara, Italy. |
| SU011 | The Straits Times | Semiconductor start-up Silicon Box opens $2.65 billion factory in S’pore | The 73,000 sq m facility in Tampines is designed to manufacture semiconductor chiplet interconnections that can be applied in areas such as artificial intelligence, electric vehicles and wearables. |
| SR001 | ANTARA News / PR Wire | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | The Tampines factory had its grand opening in July 2023, with mass production starting later that year. In 2024, the facility achieved ISO 9001:2015 certification, followed by ISO 14001:2015 and ISO 45001:2018 certifications in 2025. |
| SR002 | imec | Silicon Box Announces It Joins Imec Automotive Chiplet Program to Strengthen Chip Supply Chains for Next-Generation Vehicles | Silicon Box will support the ACP’s research initiative with its end-to-end know-how in chiplet interconnection, from consulting on optimal chiplet architecture for sustainable and scalable technology roadmaps, to turnkey solutions for advanced packaging and testing. |
| SR003 | Reuters | Silicon Box to invest $3.5 billion in new chip plant in Italy | The exact site for the plant has yet to be decided with several locations available and Rome will also need European Commission's approval for planned financial aid, which the ministry said it expected to receive soon. |
| SR004 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging | With an investment thesis set, what we later realized was it was a matter of time, not if, before we partnered with Silicon Box. |
| SR005 | Tracxn | Silicon Box | Silicon Box has raised a total funding of$658M over 7 round s.Its first funding round was on Jul 21, 2023.Its latest funding round was a Conventional Debt round on Jun 09, 2026 for $77.7M. |
| SR006 | Silicon Valley Investclub | Silicon Box — $1.55B · CEO Byung Joon Han | Valuation (Aug 5, 2024)$1.55B |
| SR007 | U.S. Federal Register / Bureau of Industry and Security | Foreign-Produced Direct Product Rule Additions, and Refinements to Controls for Advanced Computing and Semiconductor Manufacturing Items | Interim final rule. |
| SR009 | Chiplet Marketplace | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | Silicon Box's proprietary technology is able to support chiplet integration by addressing challenges in performance, scalability and costs in wafer-level and traditional packaging schemes. |
| SR011 | Newswire | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | |
| SV001 | TechNode Global | Singapore's Silicon Box secures $78M financing to accelerate growth in advanced packaging | The financing follows closely on the company’s recently completed $150 million Series B2 equity round, further strengthens Silicon Box’s capital structure to support its next phase of growth, and accelerates the global deployment of its advanced packaging solutions. |
| SV002 | Tracxn | Silicon Box | Silicon Box has raised a total funding of$658M over 7 round s. |
| SV003 | Chiplet Marketplace | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | Silicon Box's 100-million-unit production milestone demonstrates that the company is on track to achieve its capacity and production targets at its flagship facility, with full capacity installation expected by 2028. |
| SV004 | Newswire.com | Silicon Box Ships 100M Units, Proves Advanced Panel-Level Packaging Ready for AI, HPC era | The Tampines factory had its grand opening in July 2023, with mass production starting later that year. |
| SV005 | TDK Ventures | Why We Invested in Silicon Box and the Advanced Chiplet Packaging | Innovation in chiplet-to-chiplet interconnect that improves the performance and reduces the cost. |
| SV006 | Silicon Box | Silicon Box Secures SGD 100M Financing to Accelerate Growth in Advanced Packaging | The financing follows closely on the company’s recently completed USD 150 million Series B2 equity round, further strengthens Silicon Box’s capital structure to support its next phase of growth, and accelerates the global deployment of its advanced packaging solutions. |
| SV007 | Silicon Valley Investclub | Silicon Box — $1.55B · CEO Byung Joon Han | Valuation (Aug 5, 2024)$1.55B |
| SV008 | Macrotrends | Amkor Technology market cap history and chart | Amkor Technology market cap as of February 06, 2026 is $12.2B. |
| SV009 | Intel Market Research | Advanced Semiconductor Packaging Market Size, Share & Forecast 2026 to 2034 | Establishing a dedicated advanced packaging line demands multi‑billion‑dollar investments in lithography, wafer‑bonding, and inspection equipment. Smaller entrants often lack the financial bandwidth, resulting in market concentration among a handful of players. |
| SV010 | Grand View Research | Advanced Packaging Market Size, Share & Trends | The global advanced packaging market size was valued at USD 41.7 billion in 2025 and is projected to grow from USD 43.9 billion in 2026 to USD 66.0 billion by 2033, at a CAGR of 6.0% from 2026 to 2033. |